The number and length of signal paths in VLSI circuits continues to increase. Signal repeaters are used in VLSI circuits to maintain signal strength through long lines. That is, a long line is broken into smaller segments and signal repeaters are used to drive digital signals between the segments. While signal repeaters are useful in maintaining digital signal levels on long signal paths, they can be problematic because their intrinsic delay may reduce signal speed. They can also be problematic because they cannot be used with bi-directional lines.
Certain nodes in a signal path must receive a signal at a specified time in order for a VLSI circuit to operate properly. A traditional approach to insuring fast signal speeds at critical nodes is to provide a relatively wide signal line and increased spacing between adjacent signal lines. The problem with this approach is that it is relatively space-intensive.
In view of the foregoing, it would be highly desirable to provide a technique for accelerating digital signals that does not rely upon the relatively space-intensive solution of widening signal line routing pitches.